FPGA工程師職位描述：
[學(xué)歷要求]
通訊工程/電子工程/自動化等相關(guān)專業(yè)碩士畢業(yè)
[招聘條件]
1. Familiarity with FPGA prototyping and the whole FPGA design flow.
2. Good skill on hardware description language (VHDL/Verilog), in-depth knowledge of ModelSim, Quartus II or Xilinx ISE and other necessary EDA tools.
3. Experience with FPGA design using Altera, Xilinx or Actel.
4. Good background in analog & digital circuits, and strong analysis capability and debugging skill for analog/digital circuits.
5. Good background in communication theory, embedded systems and signal processing technology, experience on baseband signal processing and algorithm is a plus.
6. Knowledge of the GPS principles and applications is an advantage.
7. Good English reading and writing skill.
[注意事項]
1. 簡歷收取時間: 簡歷收取時間：2013年01月31日前
* 列明本科(含)以上學(xué)歷就讀學(xué)校、專業(yè)及專業(yè)課程
* 若為應(yīng)屆或在讀學(xué)生，請附上各專業(yè)課程成績單
3. 所有簡歷內(nèi)容請以單個PDF附件的形式發(fā)送
4. 應(yīng)聘郵件標題請使用以下格式 ：應(yīng)聘FPGA工程師-姓名。
5. 對符合要求的應(yīng)聘者，我們將郵件/電話通知您面試時間，請注意查收郵件。
有意者請發(fā)簡歷至hr@gpsspace.com
[學(xué)歷要求]
通訊工程/電子工程/自動化等相關(guān)專業(yè)碩士畢業(yè)
[招聘條件]
1. Familiarity with FPGA prototyping and the whole FPGA design flow.
2. Good skill on hardware description language (VHDL/Verilog), in-depth knowledge of ModelSim, Quartus II or Xilinx ISE and other necessary EDA tools.
3. Experience with FPGA design using Altera, Xilinx or Actel.
4. Good background in analog & digital circuits, and strong analysis capability and debugging skill for analog/digital circuits.
5. Good background in communication theory, embedded systems and signal processing technology, experience on baseband signal processing and algorithm is a plus.
6. Knowledge of the GPS principles and applications is an advantage.
7. Good English reading and writing skill.
[注意事項]
1. 簡歷收取時間: 簡歷收取時間：2013年01月31日前
* 列明本科(含)以上學(xué)歷就讀學(xué)校、專業(yè)及專業(yè)課程
* 若為應(yīng)屆或在讀學(xué)生，請附上各專業(yè)課程成績單
3. 所有簡歷內(nèi)容請以單個PDF附件的形式發(fā)送
4. 應(yīng)聘郵件標題請使用以下格式 ：應(yīng)聘FPGA工程師-姓名。
5. 對符合要求的應(yīng)聘者，我們將郵件/電話通知您面試時間，請注意查收郵件。
有意者請發(fā)簡歷至hr@gpsspace.com